A power control semiconductor device achieves both of high breakdown voltage and low on resistance. One example of such a device is a vertical MOSFET (Metal Oxide Semiconductor Field Effect Transistor) having a super junction structure (also referred to as a “SJ structure”) in which p-type (or n-type) semiconductor layers are buried in n-type (or p-type) semiconductor layers and n-type regions and p-type regions are alternately placed. In the SJ structure, an n-type impurity amount included in the n-type region and a p-type impurity amount included in the p-type region are made equal to form pseudo non-doped regions and achieve high breakdown voltage. At the same time, it is possible to achieve low on resistance by conducting electric current in a high concentration impurity region.
One method of forming the SJ structure includes a method of, for example, forming trenches in n-type semiconductor layers and burying the p-type semiconductors in these trenches to provide p-type semiconductor layers. However, according to this method, void portions (voids) are likely to be formed in the p-type semiconductor layers.